“Dark current” refers to charge that alters a pixel signal and which is not generated by light detected by a photosensor. Such charge can aggregate with photocharge at the floating diffusion region of a pixel cell, and thereby increase the total charge sensed at the floating diffusion region and read out as a pixel signal. Dark current sources include, for example, substrate leakage and optical leakage. “Substrate leakage” refers to a leakage of charge from the substrate to the floating diffusion region. “Optical leakage” refers to a photogeneration of charge caused by light impinging on the floating diffusion region and from other sources.
A more specific example of potential sources of dark current is described with reference to FIGS. 1 and 2, which illustrate a conventional CMOS image pixel cell 150 and its operation. FIG. 1 is a circuit diagram of the image pixel cell 150, which accumulates photocharge in response to detected light and outputs signals representing the amount of accumulated photocharge. Prior to an integration period and in response to a first reset control signal RST1, an n-type accumulation region 101A of a photosensor 101, shown as a photodiode PD, is reset by a first reset transistor 105 having source/drain terminals respectively connected to a voltage supply PVDD1 and the accumulation region 101A. A p-type substrate layer 101B abuts the accumulation region 101A to form the photodiode photosensor 101. During the integration period, photocharge is generated by the photosensor 101 in response to impinging light and collected in the accumulation region 101A. In addition, substrate leakage, electrons entering the accumulation region 101A from the substrate, can contribute dark charge to each of the accumulation region 101A and floating diffusion region 102; and optical leakage, caused by stray light hitting the floating diffusion region, contributes dark charge to floating diffusion region 102. After the integration period and in response to a charge transfer signal TX, a transfer transistor 106 transfers the photocharge and dark charge within the accumulation region 101A to the floating diffusion region 102.
The transferred photocharge is stored at the floating diffusion region 102, which is connected to a gate of a source follower transistor 108 and has source/drain terminals connected to the voltage supply PVDD3 and source/drain of a row select transistor 109. The source follower transistor 108 generates an output signal VOUT representing the amount of charge stored at the floating diffusion region 102. Any dark charge contributed directly to the accumulation region 101A before the charge transfer operation is swept into the floating diffusion region 102 during charge transfer, where it aggregates with the dark charge contributed directly to the floating diffusion region 102. In the time period between the charge transfer and readout of the image signal VSIG, substrate and optical leakage can continue to contribute more dark charge to the floating diffusion region 102. In response to a row select signal ROW, the row select transistor 109 gates the output signal VOUT from the source follower transistor 108 to a column line 165 for subsequent signal processing. When representing the amount of photocharge at the floating diffusion region 102, the output signal VOUT is more particularly denoted as image signal VSIG.
In response to a second reset signal RST2, the floating diffusion region 102 is reset by a second reset transistor 107 having source/drain terminals connected to voltage supply PVDD2 and the floating diffusion region 102. The resulting amount of reset charge at the floating diffusion region 102 biases the gate of the source follower transistor 108, which consequently generates another output signal VOUT to the column line 165 (via row select transistor 109). Only an insignificant amount of dark charge, if any, is leaked into the floating diffusion region 102 during the reset operation.
When representing the amount of reset charge at the floating diffusion region 102, the output signal VOUT is more particularly denoted as reset signal VRST. Although the same reset voltage is applied to a plurality of similarly constructed image pixel cells 150 within an imaging device, the individual image pixel cells 150 may generate different reset signals VRST because of device imperfections causing different degrees of signal error. Since the imperfections cause substantially equal errors in the image and reset signals VSIG, VRST of a given image pixel cell 150 and in order to reduce other common node noise, a differential signal VRST−VSIG is produced for each image pixel cell 150 to offset such errors. The differential signals VRST−VSIG of the individual image pixel cells 150 are digitized and collectively used to form an image.
FIG. 2 contains potential diagrams illustrating contributions of photocharge PC and dark charge DC to a readout signal VSIG of the image pixel cell 150 of FIG. 1. The contributions of photocharge PC and dark charge at the photodiode DC(PD) and at the floating diffusion region DC(FD) are shown by arrows pointing to the illustrated wells of the accumulation region 101A and floating diffusion region 102. The reference characters “DC(PD)” and “DC(FD)” refer more particularly to respective dark charge contributed to the accumulation region 101A (which is part of the photodiode photosensor 101) and to the floating diffusion region 102. Switching on and off of the reset and transfer transistors 105-107, during operation of the image pixel cell 150, is shown by the rise and fall of their respective potential bands due to control signals RST1, RST2, TX.
In operational step 201, the accumulation region 101A and floating diffusion region 102 are reset by switching on the first and second reset transistors 105, 107, respectively. As a result, charges held in region 101A and floating diffusion region 102 are depleted. In step S202, during the integration period, photocharge PC and dark charge DC(PD) are accumulated by the accumulation region 101A of the photodiode PD. In addition, dark charge DC(FD) is accumulated by the floating diffusion region 102. In step S203, when the transfer transistor 106 is switched on, both photocharge PC and dark charge DC(PD) are swept from the photodiode PD into the floating diffusion region 102. In step S204, the photocharge PC and dark charge DC(PD)+DC(FD) within the floating diffusion region 102 is sensed by the source follower transistor 108 and read out as an image signal VSIG. In step S205, the floating diffusion region 102 is reset by switching on the second reset transistor 107. In step S206, the reset charge is sensed and read out as the reset signal VRST.
The image signal VSIG of the image pixel cell 150 does not indicate the amount of photocharge PC in the floating diffusion region 102, but rather indicates both the collective amount of photocharge PC and dark charge DC(PD), DC(FD) stored in the floating diffusion region 102. Thus, because the image signal VSIG has a photocharge component VSIG(PC) (i.e., resulting from photocharge) and a dark charge component VSIG(DC) (i.e., resulting from dark charge), a pixel value produced from a differential signal VRST−VSIG of the image pixel cell 150 will not accurately reflect the amount of light detected by the photosensor 101. The dark charge component VSIG(DC) represents the “dark current error” in the image signal VSIG. Because an insignificant amount of dark charge is accumulated in the floating diffusion region 102 during the reset operation, the dark charge component VSIG(DC) of the image signal VSIG represents the “dark current error” in the differential signal VRST−VSIG.
FIGS. 3A and 3B are diagrams illustrating one example of the result of dark current error. More particularly, FIG. 3A illustrates a pixel cell array 30 having a plurality of image pixel cells 150 arranged in rows 33R and columns 33C. FIG. 3B illustrates an image I of a monotone object (e.g., a flat gray screen) captured by the array 30. Each pixel P of the image I is produced from a differential signal VRST−VSIG of a respectively positioned image pixel cell 150, e.g., a pixel Px,y is produced from the differential signal VRST−VSIG of an image pixel cell 150x,y (where x and y respectively denote a column 33C and row 33R) during pixel array readout following a global shutter operation. The brightness of each pixel P is indicated by its respective amount of stippling (dots), such that brighter pixels P have more stippling than darker pixels P. In a global shutter operation, all photosensors integrate over the same time period and then transfer their charges at the same time to an associated floating diffusion region. Readout, however, occurs row-by-row.
As shown by the progressive increase in stippling of the pixels P, along direction A, the image I as read out row-by-row does not correctly show the object as being monotone. Rather, the image I shows the object as increasing in brightness along direction A. This “vertical shading” caused by the global shutter operation in which all image pixel cells 150 synchronously perform steps S201-S203, but the output signals VOUT (VSIG, VRST) of the image pixels cells 150 are read out on a row-by-row basis from top-to-bottom of the array 30, i.e., read out along direction A. Thus, the amount of idle time between global charge transfer and signal readout is different for each row 33R of image pixel cells 150 (e.g., the length of duration between steps of S203 and S204 is different for each row 33R), such that dark charge accumulates in the later-read image pixel cells 150 (i.e., image pixel cells 150 in the lower portion of the array 30) for a longer time period than it collects in the earlier-read image pixel cells 150 (i.e., upper image pixel cells 150). This discrepancy causes a progressive increase in the amount of dark charge accumulated by the pixel cells 150 along direction A, and a corresponding increase in the brightness of the image I along direction A, as well.
A system, method, and apparatus that mitigates dark current error is desired.